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Dunno if you ever heard of Majority gate (best two out of three, calculates Carry). Bias vote A low: takes B AND C to overrule. Biased high: B OR C or both might agree. Majority vote with all inputs and output inverted (DeMorgan'd) is still the same Majority vote and its own evil opposite.
negating all inputs and outputs also negates the operator (for ∨ and ∧) like
¬(¬a ∨ ¬b) = a ∧ b
So if you can use AND, OR, NAND, and NOR the only point to using it would be if any has both inputs negated. (I had to search for De Morgan's Law as that behavior was common sense to me or at least, I couldn't remember ever hearing of it.)
Happy to help :)
I was hunting for an answer like this after I finished a level where I needed to AND a couple of bytes but didn't have a byte level AND gate. Only byte level OR and NOT gates.
So, instead I ended up exploding out the bits and AND-ed them individually. I figured there was a more elegant solution and saw someone accomplish the same thing using the byte level OR and NOT gates. I didn't understand how they knew to do that, or what was happening until I came across this explanation. Thanks!
The series would include an easier to understand version of this guide..
I'd appreciate some input on how I could go about improving this guide.
Right now I'm mostly thinking about adding images showing the corresponding circuits and maybe using an easier to understand notation (Not, And, Or instead of ¬, ∧, ∨).
Search Boolean Algebra
Go to playlist ----> Digital Electronics. Better than college.
@veeddubb Unfortunately I can't really help you with that. I have to admit I am not too experienced in boolean algebra myself.
If you can't find a good source I would recommend looking up kind of a cheat sheet with "all the laws" and practising those by just applying them to different boolean expressions (and then checking that the expressions are equal).
However there's one thing that I would highly recommend to you: Karnaugh maps. They will allow you to simplify your circuits / boolean expressions (though they will exclusively use AND, OR and NOT gates rather than using NAND and alike - so you might be able to further reduce the gate count if you use these). Make sure you know about the "disjunctive normal form" before looking up Karnaugh Maps (and while you're at it you might want to take a look at the "disjunctive normal form", just for good measure).
I hope this was at least somewhat useful to you. If you find a great source, let me know.